Semiconductors: Etching the new map of strategic supply

The semiconductor industry faces a structural tension between long manufacturing timelines and short-cycle demand and policy shifts, according to an analysis by SC MR. A leading-edge fabrication plant costs over $20 billion and takes three to four years from investment decision to first production wafer, the report said. Capacity decisions made today will not produce chips until 2029 or 2030, while demand and policy can shift in a single quarter. The analysis identified three colliding timelines: manufacturing capacity constrained by physics and supplier concentration, policy environments that can change within weeks, and AI-driven demand projected to reach $975 billion by 2026 according to WSTS. The report said the most significant bottleneck is extreme concentration in the upstream equipment supply chain. EUV lithography systems required for chips at 7nm or below come solely from ASML of the Netherlands, which shipped 48 systems globally in 2025. Leading-edge deposition and etch equipment comes from Applied Materials, Lam Research, and Tokyo Electron. A new fab typically starts at yields of 30% to 50%, requiring 18 to 24 months to reach competitive yields above 80%. Customer qualification adds six to 12 months. The five largest hyperscalers are projected to spend a combined $660 billion to $690 billion on capital expenditure in 2026, nearly tripling from approximately $256 billion in 2024. High-bandwidth memory is sold out through 2026 across all three major manufacturers, Micron CEO Sanjay Mehrotra confirmed.